A00-280 test - Clinical Trials Programming Using SAS 9 Updated: 2023
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Exam Code: A00-280 Clinical Trials Programming Using SAS 9 test November 2023 by Killexams.com team|
A00-280 Clinical Trials Programming Using SAS 9
The A00-280 Clinical Trials Programming Using SAS 9 test is administered by SAS Institute. It is designed to assess the knowledge and skills of individuals in clinical trials programming using SAS software. Here is a detailed overview of the test, including the number of questions and time, course outline, exam objectives, and exam syllabus.
Number of Questions and Time:
The A00-280 test consists of multiple-choice and short-answer questions that evaluate your understanding of clinical trials programming using SAS 9. The total number of questions and the time limit for the test may vary, but typically, the test includes:
- Number of Questions: Approximately 55 to 65 questions
- Time Limit: 105 to 120 minutes
The A00-280 course covers a wide range of Topics related to clinical trials programming using SAS 9. The course outline may include, but is not limited to, the following areas:
1. Introduction to SAS and Clinical Trials:
- SAS programming basics and syntax
- Introduction to clinical trials and the role of programming
2. Data Manipulation and Management:
- Importing and exporting data using SAS
- Data cleaning and validation
- Combining and merging datasets
3. Data Analysis and Reporting:
- Creating summary statistics and tables
- Generating patient profiles and listings
- Creating graphs and charts
4. Clinical Trials Programming Concepts:
- Clinical trial terminology and regulations
- CDISC (Clinical Data Interchange Standards Consortium) standards
- Quality control and validation of clinical trial data
5. SAS Macros:
- Introduction to SAS macros and macro variables
- Creating and using macros in clinical trials programming
- Automation and efficiency techniques using macros
The objectives of the A00-280 test include:
- Assessing the candidate's knowledge of SAS programming fundamentals and syntax.
- Evaluating the ability to manipulate and manage clinical trial data using SAS.
- Testing the proficiency in analyzing and reporting clinical trial data using SAS.
- Assessing the understanding of clinical trials programming concepts and standards, including CDISC.
The A00-280 test syllabus covers various Topics related to clinical trials programming using SAS 9, including, but not limited to:
- SAS programming fundamentals
- Importing and exporting data
- Data cleaning and validation
- Combining and merging datasets
- Creating summary statistics and tables
- Generating patient profiles and listings
- Creating graphs and charts for data visualization
- CDISC standards and implementation
- Quality control and validation of clinical trial data
- SAS macros and automation techniques
Note: The specific content and emphasis within each subject may vary, and it is recommended to consult the official SAS Institute materials or authorized study resources for the most accurate and up-to-date syllabus.
|Clinical Trials Programming Using SAS 9|
SASInstitute Programming test
Other SASInstitute examsA00-240 SAS Statistical Business Analysis SAS9: Regression and Model
A00-250 SAS Platform Administration for SAS9
A00-280 Clinical Trials Programming Using SAS 9
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Clinical Trials Programming Using SAS 9
A Statistical Analysis Plan (SAP) defines the selection process for baseline records. This
instructs the programmer to choose the last non-missing analyte value prior to first study drug
administration (date/time). The DEMO data set contains the date/time of first study drug
administration for subject:
What will be the resulting baseline values, as selected per the SAP instructions?
A. Option A
B. Option B
C. Option C
D. Option D
From the Statistical Analysis Plan, patients age is calculated as an integer relative to date
randomized divided by 365.25. Given the following annotated CRF:
Which programming code defines the patient's age?
A. age = int((birthdt-randdt)/365.25);
B. age = int((randdt-birthdt)/365.25);
C. age= int(yrdif(birthdt,randdt, "act/365.25" ));
D. age = int((today()-birthdt)/365.25);
An action plan that describes what will be done in a drug study, how it will be conducted, and
why each part of the study is necessary is called:
A. a clinical trial plan
B. a protocol
C. a data management plan
D. a statistical analysis plan
What is the main focus of 21 CFR Part 11?
A. electronic submission requirements
B. trial safety requirements
C. statistical calculation requirements
D. trial protocol requirements
What is an international ethical and scientific quality standard for designing, conducting,
recording and reporting trials that involve the participation of human subjects?
A. 21 CFR Part 11
B. Good Clinical Practices
A patient received at least one dose of study medication prior to withdrawing from a study.
Which analysis population would always include this patient?
B. intent to treat
C. per protocol
A Statistical Analysis Plan describes a clinical trial as "A 12 week, double-blind, placebo-
controlled, randomized, multi-center study." Double-blind refers to which groups in this study?
A. treatment and control group
B. investigator and subjects
C. statistician and sponsor
D. sponsor and investigator
Given the following SAS program:
Which statement correctly identifies invalid values in the variable TRT, if only the values 'A',
B', 'C are valid?
A. if indexc(TRT, 'ABC') eq 0 then output;
B. if index(TRT, 'ABC') eq 0 then output;
C. if find(TRT, 'ABC') eq 0 then output;
D. if indexw(TRT, 'ABC') eq 0 then output;
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In our final installment of Tools of the Trade (with respect to circuit board assembly), we’ll look at how the circuit board is tested and programmed. At this point in the process, the board has been fully assembled with both through hole and surface mount components, and it needs to be Verified before shipping or putting it inside an enclosure. We may have already handled some of the verification step in an earlier episode on inspection of the board, but this step is testing the final PCB. Depending on scale, budget, and complexity, there are all kinds of ways to skin this cat.
This is the least reliable method for PCB testing and verification, but basically it means once the board is done assembling, you do no testing and just assume it will work. Granted, some circuits are simple enough, and their assembly reliable enough, that this might work for a while, and the failure rate is acceptable enough without spending money on testing. Or maybe the product is cheap and you’re selling from China so if it arrives and it doesn’t work the consumer is going to be annoyed but not demand their money back. How many times have you bought something off Alibaba or eBay only to discover it didn’t work when it arrived? Yep, they probably used the “Hope” method of PCB testing.
Plug it in
Apply a power source. Does it turn on and blink? You’re good to go. This is the simplest form of functional testing and works on a simple circuit. Functional testing means applying an input and verifying the output. It may be great if the board has an easy power source and only one or two functions and no microcontroller or code that needs to be uploaded.
This is more complex than just plugging it in; in this case a special piece of hardware is designed that mates to the circuit board somehow and runs through some tests. If there is some kind of sensor on board, it may test that sensor and verify the output. As an example, a test jig for a smoke alarm could be a box filled with smoke. You put the battery in, drop it in the box, and see if it buzzes. A more complex jig might have pogo pins or servos that actuate switches or other ways of interacting with the board to verify that it works.
The methods described above are useful for cheap circuits and may be adequate. But many PCBs have microcontrollers, and that adds a whole level of difficulty because the microcontroller needs to be programmed, and the circuit will behave differently in different states. The test and programming jigs get a lot more interesting quickly. It should be noted that part of the complexity can be avoided entirely by having the chip manufacturer ship the chips with the firmware already on them. Most of the major manufacturers offer this service. This can be great for a couple reasons: it reduces assembly line complexity, it ensures that the chips are coming from a single trusted vendor and that there are no extra units being made in ghost shifts, and it prevents the factory from stealing the design or selling it to someone else, since they never get access to the firmware. There is a cost associated with this method, though, and it’s generally accepted that you don’t do this unless you’re in pretty substantial volumes and your firmware is locked down and won’t change. This is how the big boys do it. Below that, you have to program them yourself!
So how do you program your device? Well, it depends on the chip manufacturer. Atmel, Microchip, TI, Freescale; they all have their own preferred methods of programming, whether it’s the AVRISP, CC-Debugger, JTAG, or whatever. Most times there will be some kind of header interface, sometimes populated with a connector. It’s best if you can avoid the connector, as it will likely only be used once, is an extra component to populate, and takes up lots of board space. The better option is an edge connector or a pogo pin arrangement. The handy part about the pogo pin option over regular connectors is that you can just leave some bare pads on your PCB and use a special device with some spring pins that press against the PCB and upload the code.
The hardware for doing the programming is usually handled on a device by device basis. In some cases it’s possible to have a panel of PCBs (maybe 2×2) pressed down onto a large pogo pin bed and all of the PCBs are programmed at once, making this step quick. In other cases a jig for a single PCB handles the job. Often there is no record of firmware programming, and the programmer just blindly dumps the code onto the chip every time it is plugged in.
In my experience, I’ve built jigs that are pretty smart, and cost roughly $100. A raspberry pi or cheap android tablet runs it, a python script acts as the UI, and a custom 3D printed jig with pogo pins is the interface to the PCB, connecting through a CC-Debugger or AVRISP programmer. One feature that has been extremely helpful is logging; each device has a MAC address or unique ID, and in the course of programming the Python script grabs that ID and creates a record of what time, firmware version, and any other useful information. This record then gets added to our main device database, so that we can track and support a PCB from the moment it is first programmed.
It’s important to look at cycle time for this step. Every second adds up quickly, so the faster this step can be executed, the better. That means not compiling it every time (like programming from an Arduino). Programmers often have a verify step that is optional and makes sure the microcontroller gets the code, but takes 20 or more seconds. If you are successfully programming every device, do you really need to do the verify step? Later functional testing will show whether the code failed. Look for a cycle time on programming in the 10 seconds or less range. That’s why simultaneous programming can be appealing. Though it increases the cost of the programmer, it can significantly reduce the amount of time needed.
Once the device is programmed, it is good to do additional testing on it. Generally, you can assume that the software doesn’t need to be tested on every device; it’s already been thoroughly tested in the lab and should work just fine (right? RIGHT?). What you want is to make sure that all of the features of the hardware execute the software correctly. Go through the PCB and develop a test that checks every block. First, check that the device powers up. If it doesn’t, there’s no need to test the rest of the PCB. Alert failure and why to the operator, and let them throw it in a rework bin for later. Next test that the microcontroller is functioning. Then have it communicate over the different ports it will be expected to use, like UART, USB, I2C, or others. Then have it interact with the sensors and verify that the sensors are returning values as expected. Flip all the outputs and verify that they work, and apply inputs and make sure that they are read correctly. Have it turn on whatever wireless components are on board and communicate with a device over wireless, and verify that it works. For every part of the circuit, there should be some test you can do to verify that it works, and you can get creative with your test jigs. If you can’t test it, you should question long and hard why it’s on the board in the first place.
In one project I had a sensor that had an LED and a photoresistor. During the testing, we put the device inside the test jig, which was a dark box, and measured the value of the photoresistor with the LED on and off. This way we Verified that both components were working. While we could have put an LED and photoresistor on our test jig to verify the two components independently, this was an easy solution that reduced the hardware requirements and narrowed down any potential problems to one of two components that were both easy to debug if the test failed. This same box also played tones of various volumes to test and calibrate the microphone, checked the temperature and humidity sensor over I2C for reasonable values, connected to a ZigBee network, and did all this while talking to the tester over USB, effectively verifying every component of the hardware, and storing all the calibration values to a database, again tied to the MAC address of the device.
Boundary Scan Inspection, JTAG
Some of your fancier chips will have fancier capabilities for testing. BGA devices can be very difficult to test successfully. Boundary Scan Inspection is one of the ways to test these small chips through a single JTAG interface. It allows you to run tests which control at a much lower level the values of each pin. Only chips that are compatible with JTAG (IEEE 1149.1 compliant device) can be part of a boundary scan, because these chips have special pins which, when connected to JTAG override the core logic and expose their pins to the JTAG tests. By measuring the value on the other end of the trace, the Boundary Scan Inspection allows measurement of whether there are shorts, opens, testing some board components that aren’t 1149.1 compliant, and even verifying the existence of passives connected to the pins. If you are doing high megahertz processors, FPGAs, or expensive chips, or your board already uses JTAG for programming, then this method of testing might be for you.
We won’t cover X-Ray, AOI, or flying probe testing right now. These are all completely normal testing types for this stage of the process, but we already talked about them in the previous Tools of the Trade article on inspection. Manufacturers will handle the various testing methods at different points in the process based on the complexity of the board and specifications of the client.
Tips to make testing/programming easier
If you are interested in the other Tools of the Trade articles in the series, we have:
Selecting a programming language for an embedded application used to be easy. Developers simply went with C or if they were a bit adventurous, they might choose C++ and invoke a heated debate amongst colleagues who felt that C++ was dangerous, inefficient and so on (an argument which still rages today although not nearly as much as half a decade ago). The last couple of years have provided developers with alternative options, with languages such as Python, Rust, Java and several scripting languages becoming options for developers. In this post, we are going to look at 5 tips for selecting the programming language that best your development needs.
Tip #1 – Consider Real-time Performance
When it comes to embedded systems, real-time performance is critical, whether that performance is soft real-time or hard real-time, deadlines need to be met. Real-time performance seems like a strange characteristic to consider given that performance is not strictly tied to language but several factors. However, if you think about the performance you can get from a system that is developed properly in assembly, versus one that is developed in C/C++ versus one written in Python, you’ll find that assembly would probably win every time. Obviously using assembly would be nightmare so you trade-off some performance for being able to write more maintainable and portable code.
Tip #2 – Select Languages that are Standardized and Evolve Slowly
Using the latest and trending language can be a great way to get attention, but the problem with many languages that have targeted embedded systems over the last 50 years is that they are short lived and have been unable to usurp C. They are just a fad that quickly gives way to some other language. When developing a product, if that product will be in production or the code will be reused for 5 years or more, using a standardized language may make a lot more sense. New languages often either are not yet standardized and evolve at a rapid rate. For example, Python is well defined, but the techniques and libraries available within any embedded target is often less than the standard set and constantly changing, making it a much lesser subset of the whole language which is evolving faster than the subsets can keep up with. Standardization and evolution are important to consider when selecting your language.
Tip #3 – Select a Language that is Understood by the Team
I often run across development teams where a single, strong willed developer, was able to convince their colleagues that a specific framework, OS or language should be used. It’s often something that is cutting edge and an area of interest for the developer. The team reluctantly gets onboard and then 6 months or a year down the road, after significant progress has been made, the primary developers leaves. The development team is left with code that they don’t fully understand, struggle to learn and a small nightmare ensues for half a decade or more. The moral of this little story is that it’s important to select a language that the whole team is onboard with and where it is easy to find developers in the labor pool for in order to minimize not just headaches, but development costs and schedules.
Tip #4 – Review the Language Runtime Requirements
All languages are not created equal. For example, if you were to write an application in C that blinks an LED, you could easily write the code to initialize the processor, GPIO peripheral, timer and main function in less than two kilobytes of code space. If a developer were to write that same program in Python, the code for the application might be fewer lines of code or more elegant, but the code space required for the Python interpreter and supporting libraries could easily be over 300 kilobytes of space! For a simple application, using a higher-level language that has larger runtime requirements probably doesn’t make sense. Then again, on a more complex IoT device, it may make a lot more sense. The developer has to look at what they are doing and evaluate the runtime requirements and see how it fits within their overall project needs.
Tip #5 – Select a Language with a Strong Community
Finally, I believe it is important to look at the community around the programming language. Obviously programming languages such as C and C++ have strong communities around them and lots of example code. Languages like Python also have a very strong community and places developers can go in order to learn and ask questions. Languages like Rust are interesting because they have a growing community, but it may be still too early to determine if it will last over the long-term.
There are a lot of exciting things happening in embedded system programming languages right now, with more options appearing every day. Developers should be proactive in trying, learning and testing new languages, but it is important that for any long-term product development developers select a language that is standardized, well understood and will be maintained for years to come. Don’t rule out any new languages, but carefully evaluate whether it truly makes sense to use them in your development cycle, or whether you want to use them simply because it’s cool and different.
Jacob Beningo is an embedded software consultant who currently works with clients in more than a dozen countries to dramatically transform their businesses by improving product quality, cost and time to market. He has published more than 200 articles on embedded software development techniques, is a sought-after speaker and technical trainer, and holds three degrees which include a Masters of Engineering from the University of Michigan. Feel free to contact him at [email protected], at his website, and sign-up for his monthly Embedded Bytes Newsletter.
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UDRI Sensor Test and Evaluation researchers assess commercial electro-optical, infrared, and synthetic aperture radar sensor systems against customer requirements. We primarily provide aerial and ground imaging subject matter expertise to support sensor technology evaluation, sensor acquisition, implementation, and data analysis activities.
Our experienced engineers, scientists, and technicians perform laboratory, field, and flight test activities with end-to-end planning, coordination, and execution. Additionally, we design, fabricate, and deploy custom instrumentation, test fixtures, and targets to support our clients’ evaluation requirements.
Our assessment goes beyond evaluating the technical specifications of the sensor. We assess the human factors impact on operators and data end users as well as the ease of maintenance and data processing and management. This breadth of capabilities leads to recommendations that help the customer better understand the organizational end-to-end cost and impact before bringing a sensor system online.
Our customers include the US Air Force (AFIT, NASIC, AFLCMC, AFRL, AFMC) and the Defense Threat Reduction Agency. We are highly experienced in commercial sensor technologies and integrating them into aeronautical applications. In addition, we are experts in Treaty for Open Skies requirements and matching commercial sensor technologies to them.
Contact us today for accurate, reliable, and comprehensive sensor system assessment. Whether evaluating specifications, developing new workflow processes for sensor upgrades, or understanding the complexities of commercial sensors for military applications, we have the expertise to enable informed decisions.
Top: Resolution analysis underway at UDRI's Sensor Test and Evaluation Laboratory.
RIT Transfer Credit Equivalencies
The following is a collection of external courses that have been reviewed and determined to be equivalent to RIT courses and/or are applicable to general education or elective requirements. Many of the equivalencies are a direct (one-to-one) match, where one external course is equivalent to one RIT course. However, there are some instances where multiple external courses may be listed as equivalent to one or more RIT courses. In these cases all courses must be completed to receive the listed credit.
Be sure to read the “Notes” column for any specific information about individual rules.
Per RIT policy, only grades of C or higher are accepted for transfer credit. No transfer credit will be awarded for grades of C- or lower.
This equivalency list is available to provide information on how transferred courses will be awarded credit at RIT. However, the list does not guarantee the credit will count for a specific RIT program requirement. Before taking a course outside of RIT, it is important for current RIT students to speak to their academic advisor to determine if the transfer courses are appropriate for their plan of study.
TXFR – Potential Elective Credit
Individual degree programs make the decision if elective credit will be awarded when there is not an direct course equivalency. These courses are listed as TXFR 100 – Potential Free Elective Credit, and TXFR 101 – Potential General Education Elective credit. If there are questions regarding if and how this credit will be accepted by a particular degree program, please contact that program.
If you are interested in a transfer course that is not on the equivalency list, please complete the articulation request form. Please note it can take up to three weeks for a course to be reviewed and an equivalency to be determined.
The Covid-19 pandemic was a disaster. Over a million Americans died — many in isolation in hospitals and nursing homes, far from their friends and family — and millions more became seriously sick, lost their jobs, or felt the effects of widespread economic and social disruption. Students suffered irreversible learning losses, with many exiting the public-school system altogether. Patients delayed or were denied health care unrelated to Covid-19, from cancer treatment to routine vaccination. Mental-health issues and domestic abuse spiked.
Federal, state, and local authorities frequently made confusing or contradictory policy decisions, leaving Americans bewildered and frustrated. In many places, churches and schools shuttered while bars and liquor stores remained open. The Centers for Disease Control and Prevention (CDC) was among the most prominent federal institutions at the center of this maelstrom. One of the agency’s key functions during the pandemic — and a source of much controversy — was to provide public-health guidance: advice to institutions and individuals about how to behave in response to the threat of a novel coronavirus.
CDC guidance itself isn’t new — the agency has been issuing public-health guidelines and warnings for years — but it took on a new and outsized role during the pandemic. Americans learned the hard way that the CDC is not just a public-health agency; it is part of the administrative state, embedded in a powerful federal bureaucracy with considerable influence over economic and social life. Yet the CDC’s policy guidance is peculiar, neither strictly regulatory nor simply advisory. And the processes and evidence the CDC uses to make such consequential decisions are, compared with those of other administrative agencies, unusually opaque.
Recent survey data from the American Enterprise Institute’s Survey Center on American Life show a dramatic decline in public trust in scientific and medical expertise from before the pandemic to today. It may take years for the public-health community — and the CDC, in particular — to recover. As a first step toward regaining its legitimacy, the CDC should consider reforming its public-health guidance — not only to help it make better decisions, but also to increase the transparency and accountability of its decision-making process.
Read the entire article in National Review.
By Shine Chung, Chairman of Attopsemi™ Technology
OTP stands for “One-Time Programmable”, a device that can only be programmed once to store data permanently but ideally read infinite times. Traditionally, testability has been an issue for OTP. Every OTP bit should be programmed to ensure programmability. However, if only a single bit is programmed, the OTP block can no longer be used.
Patented by Attopsemi™, I-fuse™ is a revolutionary non-breaking fuse technology that can be reliably programmed by heat assisted electromigration below a break point. Any cell can be tested as programmable if the initial fuse resistance is low enough (e.g. <400 ohms) to generate enough heat for programming. The program voltage range can be tested and calibrated in a way that program yield can be predicted accurately. In I-fuse™ design, a pseudo-programmed state can be created by applying a low voltage programming during read, called Concurrent Low-Voltage Write Read (CLVWR). By combining the normal read and pseudo-programmed read, complex SRAM-like test patterns can be generated to fully test a complete I-fuse™ OTP macro with 100% fault coverage.
Introduction to OTP
OTP is used in many applications, for example, to customize a chip after fabrication, to store chip ID, firmware, security key, or configuration data, work around defect/contamination, trim device variations, or enable/disable certain functions. OTP is one of the four foundational IPs, along with I/O library, standard cell library, and SRAM compiler, that every customer needs to tapeout their chips to foundries for fabrication.
The conventional OTP programming concepts are based on storing or breaking something to create “permanent” programmed states. These mechanisms all have varying levels of deficiencies. Storing charges in a floating gate requires the gate oxide to be not too thick for charge injection and not too thin to retain charges. Rupturing gate oxide requires high voltage that may attract charges to trap in the gate oxide and can appear to breakdown, called soft breakdown. These charges can return to their original state after burn-in and the ruptured oxide can appear to be self-healed. Breaking an electrical fuse is equivalent to an explosion. During the programming, debris can be created and micro-bridged again becoming shorts. These types of OTP have severe reliability issues that need to implement redundancy, Error Correction Code (ECC), or twin cells.
Figure 1 : Summary of different OTP technologies
I-fuse™ is a revolutionary fuse-based OTP technology that limits program voltage to below breaking voltage so that only heat-assisted electro-migration takes place for programming. The reliability defect rate has been proven to be less than 1ppb without any type of redundancies. Different OTP technologies are summarized in Fig. 1.
The comparison between conventional eFuse and I-fuse™ can be further explained. Fig. 2 depicts a typical current-voltage (I-V) curve for programming a fuse. When the applied voltage is higher, the current increases accordingly up to a certain point, called the break point. After this point, the current drops even if the voltage increases slightly. This will not take place unless the fuse breaks. There is a belief that a broken fuse can retain its program state forever. But actually the three fuses’ I-V curves shown in Fig. 2 behave differently beyond the break point. The programming is chaotic to the extent that the post-program fuse resistance can range from a few kilo-ohms to 1giga-ohm. On the other hand, if a fuse is programmed above an electro-migration threshold but below the break point, its behavior can be well predicted. The programming becomes orderly so that the post-program fuse resistance shows a nearly Gaussian distribution.
Figure 2: I-fuse™ versus eFuse in I-V curves of programming fuses.
Instead of using testers for programming, it is becoming increasingly frequent and more important to program an OTP in the field, called field programming. In this case, any OTP programming failure or yield loss can be costly. There is a 10x rule as shown in Fig. 3. If a defect cannot be identified in wafer sort but goes to packaged chip, the cost may increase from $0.1 to $1. If a defect cannot be identified in the chip but makes its way to modules, the cost may go to $10. If a defect cannot be identified in the module but goes to printed circuit board, the cost may go to $100. Ultimately, if a defect is identified in the system, the cost may skyrocket to $1,000. That’s why there are increasing demands for “ZERO defects.” The true meaning of ZERO defects is to make sure no defects occur after shipping.
Figure 3: 10X cost to identify a defect in different product stages
Testability of OTP
Testability is vital for OTP to achieve ZERO defects. Before programming any OTP bits, the OTP readouts are all in a virgin state. Without programming any OTP bits, it would be difficult to ensure all bits can be programmable in field. But if only a single OTP bit is programmed, the OTP macro can no longer be used. This is the dilemma for OTP programming that Attopsemi™ has been able to solve.
There are 3 questions to be answered for OTP:
The answers of the above three questions are tied to the unique I-fuse™ programming mechanism. Unlike explosive programming behaviors in electrical fuse or anti-fuse, I-fuse™ programming is based on heat-assisted electro-migration below an explosive (break) point. If the initial I-fuse™ resistance can be tested to be low enough to generate sufficient heat, the I-fuse™ can surely be programmable in field. Therefore, a typical destructive programming test can be replaced by a non-destructive resistance screening. Any I-fuse™ with initial fuse resistance lower than 400 ohm, for example, can be guaranteed programmable. This is unique to I-fuse™. Conventional eFuse cannot guarantee programmability even if the initial fuse resistance is low enough due to chaotic and unpredictable program behavior.
Other OTP technologies, such as floating gate, electrical fuse, or anti-fuse have yield loss when programmed in field. Typically 1-2% of yield loss is not unusual because the programming mechanisms are based on applying high voltage or high current to break or to trap something in brutal forces. However, I-fuse™ programming has a well-defined program window of above electromigration threshold and below explosive (break) point. If any I-fuse™ is programmed within this program window, the programming behavior can be characterized, and the yield can be accurately predicted.
The program window can be characterized in a straightforward way. The minimum program voltage is determined by starting with a low programming voltage and incrementing until all bits can be successfully programmed. Incrementing the program voltage until at least one unprogrammed bit becomes programmed or one programmed bit becomes unprogrammed, the immediate previous program voltage is the maximum program voltage. As long as the maximum and minimum program voltages are wide apart and within the controlled margins, the program yield can be guaranteed to be 100%. A typical program defect versus program voltage in GlobalFoundries’ 22FDX® is shown in Fig. 4. Based on the test data, the program defect rate (called Bit Error Rate, BER) can be characterized very well.
Fig. 4 I-fuse™ program window characterization in GlobalFoundries’ 22FDX®
Concurrent Low Voltage Write Read
The last question above is about how to make sure every functional block of an OTP can perform as expected. Other than whether an OTP cell can be programmed or not, how to make sure sense amplifiers actually detect a programmed state? How to test if there are any Wordlines (WL) or Bitlines (BL) opens or shorts? How to test if all X- and Y- decoders identify unique addresses correctly? How to test if control logic functions properly? And the most important question: how to make sure program circuits do not accidentally program any bits during tests?
The above questions are simple to address for memories (such as SRAM or DRAM, for example) that can be read and written multiple times repetitively by using complex test patterns, such as March patterns, by studying and writing opposite data alternately. Any stuck-at faults or coupling faults can be detected easily. However, OTP can only be written once. Even if some spare bits in OTP macros can be tested during programming, there is still no guarantee the OTP bits in the main array will function as expected.
A non-destructive program state can be created in I-fuse™ so that the conventional memory test schemes can be applicable to exercise full fault coverage by generating SRAM-like test patterns. Clarification about the I-fuse™ OTP array structure in Fig. 5 can help to further explain this.
Figure 5: I-fuse™ array structure
Like other memory structures, an OTP has n-row and m-column of OTP cells arranged in a two-dimensional array. If a 1R1D (one resistor, one diode) cell is used as an example, all the cathodes of the diodes are connected together as Wordline Bar (WLB). And all the free ends of the I-fuse™ are connected together as Bitline (BL). Accessing any OTP cell for program or read can be through enabling the WLBs and BLs, which act as X and Y selects, respectively. For example, if a WLB and an YWPG (Y-Write-Pass Gate) are both selected, the corresponding cell can be programmable if a high voltage is applied to VDDP. Similarly if a WLB and an YRPG (Y-Read-Pass Gate) are both selected, the corresponding cell resistance can be read if a sense amplifier is turned on. If an I-fuse™ resistance is low before programming, the bitline voltage will be low so that the read data would be 0. However, if an I-fuse™ resistance is high after programming, the bitline voltage will be high so that the read data would be 1. Normally, programming and studying an OTP is mutually exclusive: when an OTP cell is being programming, there is no need to read. Conversely, when an OTP cell is being read, there is no need to program. What happens when both program and read are applied to the same cell, while the “program” voltage is low enough?
In this case, the bitline voltage will be pulled higher so as to read as data 1, the program state, even for a virgin fuse. Since the “program” voltage applied is very low, no actual programming can happen. Thus, a pseudo-programmed state is created but the cell is not actually programmed. This novel test scheme developed by Attopsemi™ is called Concurrent Low-Voltage Write Read (CLVWR). With this innovative scheme, any OTP cell, cell array, WLB/BL open/short, X-/Y-decoders, control logic, or even program circuits can be tested thoroughly.
In addition to full testability which is now required by many applications such as automotive, I-fuse™ also offer other multiple benefits such as smaller silicon area without charge pumps, programmable at core or I/O voltage, ultra-low energy readable with 0.4V/1uW for RFID or energy harvest, 250oC and even 300oC qualified without any kinds of redundancies, higher temperature, faster programming and studying speeds and lower current consumption.
One-Time Programmable (OTP) memories are commonly believed to be non-volatile memory requiring explosion or brute force in order to be permanently programmed. However, Attopsemi™’s I-fuse™ OTP is proven under a non-breaking program mechanism to have better results: small macros without charge pumps, low program voltage/current and low read voltage/current, high reliability, and wide temperature applications. Furthermore, I-fuse™ is also proven to be fully testable just like other logic circuits. Programmability of an I-fuse™ can be tested on initial I-fuse™ resistance. Program yield can be predicted very accurately by calibrating the program window. Finally, every functional block can be fully tested by employing Concurrent Low Voltage Write Read (CLVWR) to read and write unprogrammed and pseudo-programmed states alternately. From every aspect, I-fuse™ is a true logic device, instead of a nonvolatile memory, so I-fuse™ doesn’t need to be qualified as such. When a logic process is qualified, I-fuse™ is qualified.
I-fuse™ has been qualified and is now in volume production with multiple foundries and technologies ranging from 0.5μm to below 10nm, including BCD and SOI.
I-fuse™ is therefore the ultimate OTP.
 Shine Chung, et al, “Ultra-small and Ultra-reliable Innovative Fuse Scalable from 0.35um to 28nm”, IEEE ICMTS Feb., 2016.
 Shine Chung, “4K8 Innovative Fuse on 22nm FD-SOI”, IEEE J. Elec. Dev. Soc (open access)
If you wish to obtain a copy of this white paper, click here
This course is divided into two parts in which students focus on core skills to help them thrive in electrical and computer engineering. The first half of the course focuses on application programming in Matlab where students learn basics of Programming, Digital Signal Processing, and Data Analysis. In the second part of the course students program a micro-controller and learn about the function of basic electronic components. Students learn to use basic test equipment such as an Oscilloscope, Function Generator, Volt Meter. This course is project and lab based.Curricula Practical Training
Curricula Practical Training. "Variable credit course, student chooses appropriate amount of credits when registering."Circuit Theory I (Formerly 16.201)
This course covers ideal elements, active and passive. It introduces and applies Ohm's Law and Kirchoff's Laws. Introduces concepts of network topology, independent and dependent variables, mesh and nodal analysis, the definition and consequences of linearity, source transformation, the superposition principle, Thevenin's and Norton's theorems, and maximum power transfer. Also covers ideal inductance and capacitance in simple circuits with the study of transient response and behavior under DC conditions.
Pre-req: MATH.1320 Calculus II, and Co-req: EECE.2070 Basic Electrical Engineering Lab I, and a 'C' or higher in MATH.1320.Circuit Theory II (Formerly 16.202)
This course covers AC circuits under sinusoidal steady-state conditions using the concept of the frequency domain. Introduces the use of complex numbers, phasors, impedance and admittance for the application of circuit laws introduced in Circuit Theory I: Thevenin and Norton's theorems, source transformation, superposition, maximum power transfer, nodal and mesh analysis. Covers power in the frequency domain, including RMS values, average power, reactive power, and apparent power. Introduction to magnetic coupling, mutual inductance, and the ideal transformer. Introduction to transfer functions, poles and zeroes in the s-plane.
Pre-Req: C- or better in EECE 2010 Circuit Theory I, or Spring 2020 grade of "P" and Co-Req: EECE 2080 Basic EE Lab II.Basic Electrical Engineering Laboratory I (Formerly 16.207)
Experimental work designed to verify theory and to acquaint students with electrical measurement techniques: experiments on meters, bridges, and oscilloscopes. Experiments are correlated with Circuit Theory I and concern: resistive measurements, Kirchhoff's laws, network theorems, conservation of power and maximum power transfer, inductance and capacitance, and first and second-order transients, operational amplifiers. MATLAB will be utilized throughout the course.
Co-Req: EECE.2010 Circuit Theory I.Basic Electrical Engineering Lab II (Formerly 16.208)
Presents experimental work designed to emphasize electrical measurement techniques of linear systems with time-varying signals. Waveform measurements with DC and AC meters as well as advanced use of the oscilloscope are also discussed. Experiments are integrated with Circuit Theory II. Experiments cover: Kirchhoff's laws for phasors, magnitude and phase measurements of impedance, network theorems, frequency response, resonance, inductance, maximum power transfer, and MATLAB techniques.
Pre-Req: EECE 2070 Basic EE Lab I; Co-Req: EECE 2020 Circuit Theory II.Fundamentals of Electricity I (Formerly 16.211/213)
This course serves as an introduction to direct current (DC) and alternating current (AC) analysis of electric circuits, with emphasis on energy and power. Covers the explanation of basic components (resistor, capacitor and inductor) and their use in electronics. Cover also the design and use of multi-range voltmeters, ammeters, and ohmmeters, series, parallel and series parallel circuits, the use of bridges, phasor analysis of AC circuits, transformers, relays, solenoids, etc. Different techniques like Superposition theorem, Thevenin equivalent circuit or Maximum Power will be presented. Students will also be introduced to DC and AC motors and generators, first and second order filters as well as basic sensors. Not for ECE students.
Pre-Req: MATH 1320 Calculus II.Fundamentals of Sound Recording (Formerly 16.214)
This course serves to instruct sound recording technology through the concepts of voltage, current, power, resistance and Ohm's law; series, parallel and resonant circuits, Kirchhoff's voltage and current laws; the Wheatstone bridge, Thevenin equivalent circuits and maximum power transfer theorem; magnetism, electromagnetism, electromagnetic devices, and transformers; a.c. current, RF signals, capacitors, and inductors; RC, RL, and RLC circuits; d.c. power sources; diodes, transistors, tubes (thermionic emission), and amplifiers. Use of voltmeters, ammeters, ohmmeters, and oscilloscopes are discussed and used in lab throughout the course. Not for ECE students.
Sound Recording Technology majors; Pre-Req: MATH 1320 Calculus II.ECE Application Programming (Formerly 16.216)
Introduces C programming for engineers. Covers fundamentals of procedural programming with applications in electrical and Computer engineering and embedded systems. Topics include variables, expressions and statements, console input/output, modularization and functions, arrays, pointers and strings algorithms, structures, and file input/output. Introduces working with C at the bit manipulation level. Laboratories include designing and programming engineering applications.History of Radio (Formerly 16.233)
Intended primarily for students majoring in the liberal arts. The course develops the theory of electricity from an historical perspective. Sufficient background in circuit theory, resonance, field theory and radio waves is given to provide an understanding of the principles of radio from its antecedents in the nineteenth century through the invention of the transistor in the mid twentieth century. The fundamental contributions of, for example Volta, Oersted, Morse, Maxwell, Faraday, Hertz, Lodge, and Marconi are considered. In the present century the technical advances of such figures as de Forest, Fleming, Fessenden, Armstrong and Shockley are studied. The growth, regulation and culture of American broadcasting are also central to the course. Laboratory work is required and students may use this course toward fulfilling the General Education (science/experimental component) requirement of the University. Not open to students in the College of Engineering.Introduction to Data Communication Networks
This course is designed to convey the essentials of data communication and networking. This includes an understanding of the Open Systems Interconnection (OSI), TCP/IP and Internet models. It covers various protocols and architectures of interconnection technologies. Several concepts will be discussed that will enable students to apply the basic concepts of data communication and networking technology in many practical situations.
Pre-req: EECE.1070 Introduction to Electrical and Computer Engineering, and MATH.1310 Calculus I, and PHYS.1410 Physics I.Logic Design (Formerly 16.265)
Number systems and binary codes. Boolean algebra. Canonical and fundamental forms of Boolean functions. Function expansion and its applications to digital circuit design. Minimization of Boolean functions by Boolean algebra and Karnaugh maps. Two-level and multi-level digital circuits. Decoder, encoders, multiplexers, and de-multiplexers. Latches and flip-flops. Registers and counters. Analysis and synthesis of synchronous sequential circuits. Design of more complex circuits: data-path and control circuits. Use of software tools to implement a design on modern hardware.
Pre-req: MECH.1070 intro to Mechanical Eng, or COMP.1020 Computing II, or EECE.1070 Intro to Elec. & Comp. Engin, or EECE.2160 ECE Application Programming.Electronics I Lab (Formerly 16.311)
Laboratory experiments coordinated with the subject matter of Electronics I. This lab explores the characteristics and use of electronic instrumentation for making measurements on electronic circuits. Labs will utilize the methods of designing and characterizing diode and transistor circuits. They will analyze the performance characteristics of digital and linear semiconductor circuits, including logic elements and amplifiers. The design and construction of circuits using monolithic op amps will also be explored.
Pre-req: EECE.2080 Basic EE Lab II, and Co-req: EECE.3650 Electronics I.Electronics II Laboratory (Formerly 16.312)
This course covers laboratory experiments coordinated with the subject matter of Electronics II, Study of high-frequency characteristics of transistors and transistor amplifiers. Covers feedback in electronic circuits, electronic oscillators and differential amplifier. Covers also the properties of linear IC operational amplifiers and their application in amplifier circuits and waveform generation circuits. Design and analysis of linear circuits.
Pre-req: EECE.3110 Electronics I Lab, and Co-req: EECE.3660 Electronics II.Microprocessors Systems Design I (Formerly 16.317)
Introduction to microprocessors, Uses assembly language to develop a foundation on the hardware which executes a program. Memory and I/O interface design and programming. Design and operation of computer systems. Study of microprocessor and its basic support components, including detailed schematics, timing and functional analysis of their interactions. Laboratories directly related to microprocessor functions and its interfaces (e.g. memory subsystem, I/O devices and coprocessors).
Pre-req: EECE.2160 ECE Application Programming, and EECE 2650 Logic Design.Data Structures (Formerly 16.322)
Covers algorithms and their performance analysis, data structures, abstraction, and encapsulation. Introduces stacks, queues, linked lists, trees, heaps, priority queues, and hash tables, and their physical representation. Discusses efficient sorting (quicksort and heapsort) and experimental algorithm analysis. Examines several design issues, including selection of data structures based on operations to be optimized, algorithm encapsulation using classes and templates, and how and when to use recursion. Assignments include programming of data structures in an object-oriented language.
Pre-Req: EECE.2160 ECE Application ProgrammingElectromechanics (Formerly 16.355)
Alternating current circuits, three phase circuits, basics of electromagnetic field theory, magnetic circuits, inductance, electromechanical energy conversion. Ideal transformer, iron-core transformer, voltage regulation, efficiency equivalent circuits, and three phase transformers. Induction machine construction, equivalent circuit, torque speed characteristics, and single phase motors. Synchronous machine construction, equivalent circuits, power relationships phasor diagrams, and synchronous motors. Direct current machines construction, types, efficiency, power flow diagram, and external characteristics.
Pre-Req: EECE.2020 Circuit Theory II.Engineering Electromagnetics I (Formerly 16.360)
Electromagnetics I is the study of fundamental electrostatic and magnetostatic equations building up to the foundation of electrodynamics, Maxwell's Equations. This course is put into an engineering perspective by describing transmission line properties using circuit models and deriving these model parameters directly from Maxwell's Equations. To accomplish these tasks, Engineering Electromagnetics I implements: Transmission lines as Distributed Circuits, Smith Charts, impedance Matching, Electrostatics and Capacitance, steady current flow and Resistance, and Magnetostatics and Inductance.
Pre-Req: EECE 2020 Circuit Theory II and PHYS 1440 Physics II.Signals and Systems I (Formerly 16.362)
This course covers various continuous voltage/current time functions and their applications to linear time-invariant (LTI) electrical systems. It reviews pertinent Topics from previous courses on circuit theory, such as system functions, S-plane concepts and complete responses. It introduces step and impulse functions and their responses in LTI circuits. It covers the solving of convolution integrals and differential equations, the transformation of signals to Fourier series, the Fourier and Laplace transforms, with their application, in continuous and discrete time, and Parseval's theorem. It also describes analog filter responses and design. A computing project is proposed in this course.
Pre-Req: EECE 2020 Circuit Theory II and MATH 2360 Eng Differential Equations or MATH.2340 Differential Equations.Introduction to Probability and Random Processes (Formerly 16.363)
Introduction to probability, random processes and basic statistical methods to address the random nature of signals and systems that engineers analyze, characterize and apply in their designs. It includes discrete and continuous random variables, their probability distributions and analytical and statistical methods for determining the mean, variance and higher order moments that characterize the random variable. Descriptive and inferential statistics, as well as time-varying random processes and their spectral analysis are introduced. The course provides the skills required to address modeling uncertainty in manufacturing and reliability analysis, noise characterization, and data analysis.
Pre-Req: EECE.2020 Circuit Theory II.Engineering Mathematics (Formerly 16.364)
Complex number, Argand plane, derivatives of complex numbers, limits and continuity, derivative and Cauchy Riemann conditions, analytic functions, integration in the complex plane, Cauchy's integral formula, infinite series for complex variables. Taylor series, Laurent series, residue theory, evaluation of integrals around indented contours. Linear vector spaces, matrices and determinants, eigenvalues and eigenvectors.
Pre-Req: MATH 2360 Eng Differential Equations or MATH.2340 Differential Equations.Electronics I (Formerly 16.365)
A brief introduction to solid-state physics, leading to discussion of physical characteristics of p-n junction diodes, bipolar junction transistors, and field-effect transistors: active, saturated, and cutoff models of bipolar transistors and triode, constant current, and cutoff models of MOSFETs. Circuit models for diodes, and diode applications. Circuit models for transistors, and transistor applications in bipolar and MOS digital circuits and low-frequency amplifier circuits. Analysis of digital circuits and linear circuits based on application of circuit models of devices and circuit theory.
Pre-req: EECE 2020 Circuit Theory ll, and PHYS 1440 Physics ll, and Co-req: EECE 3110 Electronics l Lab.Electronics II (Formerly 16.366)
A continuation of 16.365 with discussion of differential amplifiers, operation amplifiers and op amp applications, transistor amplifiers at very high frequencies; direct-coupled and band pass amplifiers; small and large signal amplifiers; feedback amplifiers and oscillators. Active filters, wave form generation circuits including Schmitt trigger, multiplexers, and A/D and D/A converters. Circuit design employing integrated circuit operational amplifiers and discrete devices. Circuit analysis using SPICE. An electronic design project constitutes a major part of the course.
Pre-Req: C- or better in EECE 3650 Electronics I,or Spring 2020 grade of "P", Co-Req: EECE 3120 Electronics Lab II.Capstone Proposal (Formerly 16.399)
This course is the first in a two semester capstone sequence. In a group, students will work with a client to define their project, by identifying the problem, objective and requirements, and engage in design, analysis, test and fabrication tasks as appropriate to meet the project goals. Project management tools are discussed and applied in this process.
Pre-Reqs: EECE 3110 Electronics I Lab, and EECE 3170 Microprocessor Sys Desgn I, and EECE 3650 Electronics I.Microwave Engineering (Formerly 16.403)
An introductory course in the analysis and design of passive microwave circuits beginning with a review of time-varying electromagnetic field concepts and transmission lines. Smith Chart problems; single and double stub matching; impedance transformer design; maximally flat and Chebyshev transformers; microstrip transmission lines, slot lines, coplanar lines; rectangular and circular waveguides; waveguide windows and their use in impedance matching; design of directional couplers; features of weak and strong couplings; microwave filter design; characteristics of low-pass, high-pass, band-pass, band-stop filter designs; two-port network representation of junctions; Z and Y parameters, ABCD parameters, scattering matrix; microwave measurements; measurement of VSWR, complex impedance, dielectric constant, attenuation, and power. A design project constitutes a major part of the course.
Pre-Req: EECE.4610 Emag Theory II.VLSI Fabrication (Formerly 16.470/EECE.4700)
Fabrication of resistors, capacitors, p-n junction and Schottky barrier diodes, BJT's and MOS devices and integrated circuits. Topics include: silicon structure, wafer preparation, sequential techniques in microelectronic processing, testing and packaging, yield and clean room environments. MOS structures, crystal defects, Fick's laws of diffusion; oxidation of silicon, photolithography including photoresist, development and stripping. Metallization for conductors, Ion implantation for depletion mode and CMOS transistors for better yield speed, low power dissipation and reliability. Students will fabricate circuits using the DSIPL Laboratory.
Pre-Req: EECE.3650 Electronics I.Antenna Theory and Design (Formerly 16.462/EECE.4620)
An introduction to properties of individual antennas and arrays of antennas. Retarded potentials, dipoles of arbitrary length, radiation pattern, gain, directivity, radiation resistance. The loop antenna. Effects of the earth. Reciprocity, receiving antennas, effective length and area. Moment methods. Arrays: collinear, broadside, endfire. Array synthesis. Mutual coupling. Log-periodic and Yagi arrays. Radiation from apertures: the waveguide horn antenna, parabolic dish. Antenna noise temperature. Numerical software packages. A design project is required in the course.
Pre-Req: EECE.4610 Emag Theory II.Directed Studies (Formerly 16.409)
Provides an opportunity for qualified Electrical Engineering students to investigate specific areas of interest. The actual project undertaken may be software or hardware oriented. The most important characteristics of the projects are that the end results represent independent study, that they are research and development oriented, and that they are accomplished in an engineering environment. Design reviews and progress reports are expected for each project. A final formal report to be permanently filed in the EE Department is required for each project. Engineering Design (100%).
Pre-Reqs: EECE 3550 Electromechanics,EECE 3600 Emag Theory I, EECE 3620 Signals & Systems I, EECE 3650 Electronics I,and EECE 3660 Electronics II.Directed Studies (Formerly 16.410)
The purpose of this course is to provide an opportunity for qualified Electrical Engineering students to investigate specific areas of interest. The actual project undertaken may be software or hardware oriented. The most important characteristics of the projects are that the end results represent independent study and that they are research and development oriented, and that they are accomplished in an engineering environment. Design reviews and progress reports are expected for each project. A final formal report to be permanently filed in the EE Department is required for each project.
Pre-Reqs: EECE 3550 Electromechanics,EECE 3600 Emag Theory I,EECE 3620 Signals & Systems I,EECE 3650 Electronics I, and EECE 3660 Electronics II.Directed Studies (Formerly 16.412)
The purpose of this course is to provide an opportunity for qualified Electrical Engineering students to investigate specific areas of interest. The actual project undertaken may be software or hardware oriented. The most important characteristics of the projects are that the end results represent independent study and that they are research and development oriented, and that they are accomplished in an engineering environment. Design reviews and progress reports are expected for each project. A final formal report to be permanently filed in the EE Department is required for each project.
Pre-Reqs: EECE 3550 Electromechanics,EECE 3600 Emag Theory I, EECE 3620 Signals & Systems I, EECE 3650 Electronics I,and EECE 3660 Electronics II.Linear Feedback System (Formerly 16.413)
Concepts of feedback; open loop and closed loop systems. Feedback in electrical and mechanical systems. Mathematical models of systems and linear approximations. Transfer functions of linear systems, block diagrams and signal flow graphs. Sensitivity, control of transient response, disturbance signals. Time domain performance: steady state errors, performance indices. Stability related to s-plane location of the roots of the characteristic equation. Routh-Hurwitz criterion. Graphical analysis techniques: root locus, frequency response as polar plot and Bode diagrams. Closed loop frequency response. A control system design project is included in the course.
Pre-Req: EECE 3620 Signals & Systems I and EECE 3640 Engineering Math.Integrated Power Systems (Formerly 16.414/514)
Power System Operations and Electricity Markets provide a comprehensive overview to understand and meet the challenges of the new competitive highly deregulated power industry. The course presents new methods for power systems operations in a unified integrated framework combining the business and technical aspects of the restructured power industry. An outlook on power policy models, regulation, reliability, and economics is attentively reviewed. The course lay the groundwork for the coming era of unbundling, open access,, power marketing, self-generation, and regional transmission operations.
Pre-Req: EECE.2020 Circuit Theory II.Power Electronics (Formerly 16.473/515 & EECE.4730/5150)
A one-semester course with emphasis on the engineering design and performance analysis of power electronics converters. Topics include: power electronics devices (power MOSFETs, power transistors, diodes, silicon controlled rectifiers SCRs, TRIACs, DIACs and Power Darlington Transistors), rectifiers, inverters, ac voltage controllers, dc choppers, cycloconverters, and power supplies. The course includes a project, which requires that the student design and build one of the power electronics converters. A demonstrative laboratory to expose the students to all kinds of projects is part of the course.
Pre-Reqs: EECE 3550 Electromechanics and EECE 3660 Electronics II, or Permission of Instructor.Wireless Communication (Formerly 16.418)
Cellular systems and design principles, co-channel and adjacent channel interference, mobile radio propagation and determination of large scale path loss, propagation mechanisms like reflection, diffraction and scattering, outdoor propagation models, Okumura and Hata models, small scale fading and multipath, Doppler shift and effects, statistical models for multipath, digital modulation techniques QPSK, DPSK, GMSK, multiple access techniques, TDMA, FDMA, CDMA, spread spectrum techniques, frequency hopped systems, wireless systems and worldwide standards.
Pre-req: EECE.3630 Introduction to Probability and Random Process.Real Time Digital Signal Processing (Formerly 16.421)
This course provides an introduction to real-time digital signal processing techniques using floating point and fixed point processors. The architecture, instruction set and software development tools for these processors will be studied via a series of C and assembly language computer projects where real-time adaptive filters, modems, digital control systems and speech recognition systems are implemented.
Pre-req: EECE.3620 Signals and Systems I.Semiconductor Physics for Solid-State Electronics (Formerly 16.423)
The course covers fundamental solid-state and semiconductor physics relevant for understanding electronic devices. Topics include quantum mechanics of electrons in solids, crystalline structures, ban theory of semiconductors, electron statistics and dynamics in energy bands, lattice dynamics and phonons, carrier transport, and optical processes in semiconductors.
Pre-req: EECE.3650 Electronics I, and EECE.3640 Engineering Mathematics, and EECE.3600 Engineering Electromagnetics I, or permission of instructor.Computational Methods for Power System Analysis (Formerly 16.424/524)
The course explores some of the mathematical and simulation tools used for the design, analysis and operation of electric power systems. Computational methods based on linear and nonlinear optimization algorithms are used to solve load flow problems, to analyze and characterize system faults and contingencies, and to complete economic dispatch of electric power systems. Real case studies and theoretical projects are assigned to implement the techniques learned and to propose recommendations. Different software applications will be used concurrently including ATP, PowerWorld Simulator, Aspen, MatLab with Simulink and Power System Toolbox, PSCAD, etc.
Pre-Req: EECE.2020 Circuit Theory II.Power Distribution System (Formerly 16.4440/EECE.4440)
An intermediate course in analysis and operation of electrical power distribution systems using applied calculus and matrix algebra. Topics include electrical loads characteristics, modeling , metering, customer billing, voltage regulation, voltage levels, and power factor correction. The design and operation of the power distribution system components will be introduced: distribution transformers, distribution substation, distribution networks, and distribution equipment.
Pre-req: EECE.2020 Circuit Theory II, and EECE.2080 Basic EE Lab II.Power Systems Stability and Control (Formerly 16.426/526)
Stability definition and cases in power systems. System model for machine angle stability. Small signal and transient stability. Voltage stability phenomenon, its characterization. Small and large signal models for voltage stability analysis. Frequency stability and control. Compensation methods for system voltage regulation including classical and modem methods. Stability of multi-machine system.
Pre-Req: EECE.2020 Circuit Theory II.Advanced VLSI Design Techniques (Formerly 16.427/527)
This course builds on the previous experience with Cadence design tools and covers advanced VLSI design techniques for low power circuits. Topics covered include aspects of the design of low voltage and low power circuits including process technology, device modeling, CMOS circuit design, memory circuits and subsystem design. This will be a research-oriented course based on team projects.
Pre-req: EECE.4690 VLSI Design, or EECE.5690 VLSI Design, or Permission of Instructor.Alternative Energy Sources (Formerly 16.428)
PV conversion, cell efficiency, cell response, systems and applications. Wind Energy conversion systems: Wind and its characteristics; aerodynamic theory of windmills; wind turbines and generators; wind farms; siting of windmills. Other alternative energy sources: Tidal energy, wave energy, ocean thermal energy conversion, geothermal energy, solar thermal power, satellite power, biofuels. Energy storage: Batteries, fuel cells, hydro pump storage, flywheels, compressed air.Electric Vehicle Technology (Formerly 16.429)
Electric vehicle VS internal combustion engine vehicle. Electric vehicle (EV) saves the environment. EV design, EV motors, EV batteries, EV battery chargers and charging algorithms, EV instrumentation and EV wiring diagram. Hybrid electric vehicles. Fuel cells. Fuel cell electric vehicles. The course includes independent work.Introduction to Medical Image Reconstruction
This course provides both traditional and state-of-the-art tomographic reconstruction algorithms in a unified way. It includes analytic reconstruction, iterative reconstruction, and deep reconstruction based on the state-of-the-art deep learning techniques. This course provides fundamental knowledge for careers in medical image reconstruction.
Pre-req: EECE.3620 Signals and Systems I.RF Design (Formerly 16.431)
Two-port network parameters, Smith chart applications for impedance matching, transmission line structures like stripline, microstrip line and coaxial line, filter designs for low-pass, high-pass and band-pass characteristics, amplifier design based on s-parameters, bias network designs, one port and two port oscillator circuits, noise in RF systems.
Pre-Req: EECE.3600 Emag Theory I.Electronic Materials (Formerly 16.333/EECE.3330)
The production and processing of materials into finished products constitute a large part of the present economy. To prepare students for the use of a variety of traditional and new materials, this course will cover: atomic structure and chemical bonding, crystal geometry and defects, mechanical properties and phase diagrams of metals and alloys, electrical and optical properties of semiconductors, ceramics, and polymers; brief description of electronic, quantum electronic and photonic devices; benefits and difficulties of materials design with decreasing dimensions from millimeters to micrometers and to nanometers.
Pre-req: MATH.1320 Calculus II and PHYS.1440 Physics II.Electrical Power Substations
Power delivery for customers is made possible by sophisticated distribution systems. The backbone of distribution systems is power substations which connect, control, protect, and regulate incoming "high voltage" transmission lines to "low voltage" residential and commercial customers. This course will introduce and present basic information regarding electric power substations and the distribution of electric power, including components of power substations, individual equipment components, and electric power distribution systems. General information related to operational aspects of substations and distributing electric power is included. Topics including reactive power compensation, grounding, and protection and control are introduced in a "simplified" yet "very practical approach".
Pre-Reqs: EECE 3550 Electromechanics and EECE 3660 Electronics II, or Permission of Instructor.Introduction to Biosensors (Formerly 16.441/541)
This course introduces the theory and design of biosensors and their applications for pathology, pharmacogenetics, public health, food safety civil defense, and environmental monitoring. Optical, electrochemical and mechanical sensing techniques will be discussed.Analog Devices and Techniques (Formerly 16.445/565 & EECE.4450/5650)
A survey of analog devices and techniques, concentrating on operational amplifier design and applications. Operational amplifier design is studied to reveal the limitations of real opamps, and to develop a basis for interpreting their specifications. Representative applications are covered, including: simple amplifiers, differential and instrumentation amplifiers, summers, integrators, active filters, nonlinear circuits, and waveform generation circuits. A design project is required.
Pre-Req: EECE.3660 Electronics II.Advanced Digital System Hardware Design (Formerly 16.450)
Design of logic machines. Finite state machines, gate array designs, ALU and 4 bit CPU unit designs, micro-programmed systems. Hardware design of advanced digital circuits using XILINX. Application of probability and statistics for hardware performance, and upgrading hardware systems. Laboratories incorporate specification, top-down design, modeling, implementation and testing of actual advanced digital design systems hardware. Laboratories also include simulation of circuits using VHDL before actual hardware implementation and PLDs programming.
Pre-req: EECE.2650 Logic Design, and EECE.3650 Electronics I, and EECE.3110 Electronics I Lab, and EECE.3170 Microprocessor Systems Design I, or permission of Instructor.Heterogeneous Computing
This course introduces heterogeneous computing architecture and the design and optimization of applications that best utilize the resources on such platforms. The course Topics include heterogeneous computer architecture, offloading architecture/API, platform, memory and execution models, GPU/FPGA acceleration, OpenCL programming framework, Data Parallel C++ programming framework, performance analysis and optimization. Labs are included to practice design methodology and development tools.
Pre-req: EECE.3170 Microprocessors Systems Design I, or EECE.4821 Computer Architecture and Design, or Permission of Instructor.Microprocessor Systems II & Embedded Systems (Formerly 16.480/EECE.4800)
CPU architecture, memory interfaces and management, coprocessor interfaces, bus concepts, bus arbitration techniques, serial I/O devices, DMA, interrupt control devices. Including Design, construction, and testing of dedicated microprocessor systems (static and real-time). Hardware limitations of the single-chip system. Includes micro-controllers, programming for small systems, interfacing, communications, validating hardware and software, microprogramming of controller chips, design methods and testing of embedded systems.
Pre-Reqs: EECE 3110 Electronics I Lab, and EECE 3170 Microprocessor Sys Desgn I, and EECE 3650 Electronics I.Software Engineering (Formerly 16.453)
Introduces software life cycle models, and engineering methods for software design and development. Design and implementation, testing, and maintenance of large software packages in a dynamic environment, and systematic approach to software design with emphasis on portability and ease of modification. Laboratories include a project where some of the software engineering methods (from modeling to testing) are applied in an engineering example.
Pre-Req: EECE 2160 ECE Application Programming and EECE 3220 Data Structures. or Permission of Instructor.Computer System Security
An introduction to computer system security. This course introduces the threats and vulnerabilities in computer systems. This course covers the elementary cryptography, program security, security in operating system, database security, network, web, and e-commerce. It also covers some aspects of hardware security, legal, ethical and privacy issues in computer system security.
Pre-req: EECE.3220 Data Structures.Fundamentals of Robotics
The material in this course is a combination of essential topics, techniques, algorithms, and tools that will be used in future robotics courses. Fundamental Topics relevant to robots (linear algebra, numerical methods, programming) will be reinforced throughout the course using introductions to other robotics Topics that are each worthy of a full semester of study (dynamics, kinematics, controls, planning, sensing). Students will program real robots to further refine their skills and experience the material fully.
Pre-Req: COMP.1010 Computing 1 or EECE.2160 ECE Computing Application.Fundamentals of the Internet of Things
Explores the foundations and technologies involved in Internet of Things (IoT) from an industry perspective. Topics include Machine to Machine (M2M) communication and Wireless Sensor Networks (WSNs) and their relationship with IoT as well as their evolution. This involves all three main elements: (1) devices, (2) communications/networks and (3) analytics/applications. Specifically, it introduces technologies and interfaces associated with sensing and actuation of embedded devices and presents the fundamentals of IoT analytics including machine learning and rule-based AI. The bulk of the content presented in the course is focused on the industry-led standardization of IoT communication and networking mechanisms.
Pre-req: EECE.3170 Microprocessors Systems Design I, or Permission of Instructor.Introduction to Nanoelectronics (Formerly 16.459/559)
This course introduces the use of nanomaterials for electronic devices such as sensors and transistors. Synthesis methods for nanoparticles, nanotubes, nanowires, and 2-D materials such as graphene will be covered. The challenges in incorporating nanomaterials into devices will also be discussed. These methods will be compared to techniques used in the semiconductor industry and what challenges, technically and financially, exist for their widespread adoption will be addressed. Finally, examples of devices that use nanomaterials will be reviewed. The course will have some hands on demonstrations.Biomedical Instrumentation (Formerly 16.460/560)
A survey of biomedical instrumentation that leads to the analysis of various medical system designs and the related factors involved in medical device innovation. In addition to the technical aspects of system integration of biosensors and physiological transducers there will be coverage of a biodesign innovation process that can translate clinical needs into designs. A significant course component will be project-based prototyping of mobile heath applications. The overall goals of the course are to provide the theoretical background as well as specific requirements for medical device development along with some practical project experience that would thereby enable students to design electrical and computer based medical systems.
Pre-req: ECE senior/grad or BMEBT studentEngineering Electromagnetics II (Formerly 16.461)
Continuation of Magnetostatics, Maxwell's Equations for Time-varying Fields, plane waves: time-harmonic fields, polarization, current flow in good conductors and skin effect, power density and Poynting vector, wave reflection and transmission; Snell's Law, fiber optics, Brewster angle, radiation and simple antennas, electromagnetic concepts involved in a topical technology in development.
Pre-Req: EECE.3600 Emag Theory I.Special Topics (Formerly 16.467)
Topics of current interest in Electrical and Computer Engineering. Subject matter to be announced in advance.Electro-optics & Integrated Optics (Formerly 16.468)
An introduction to physical optics, electro-optics and integrated optics. Topics include: Waves and polarization, optical resonators, optical waveguides, coupling between waveguides, electro-optical properties of crystals, electro-optic modulators, Micro-Optical-Electro-Mechanical (MEMS) Devices and photonic and microwave wireless systems.
Pre-Req: EECE.3600 Emag Theory I.VLSI Design (Formerly 16.469/502 & EECE.4690/5020)
Introduction to CMOS circuits including transmission gate, inverter, NAND, NOR gates, MUXEs, latches and registers. MOS transistor theory including threshold voltage and design equations. CMOS inverter's DC and AC characteristics along with noise margins. Circuit characterization and performance estimation including resistance, capacitance, routing capacitance, multiple conductor capacitance, distributed RC capacitance, multiple conductor capacitance, distributed RC capacitance, switching characteristics incorporating analytic delay models, transistor sizing and power dissipation. CMOS circuit and logic design including fan-in, fan-out, gate delays, logic gate layout incorporating standard cell design, gate array layout, and single as well as two-phase clocking. CMOS test methodologies including stuck-at-0, stuck-at-1, fault models, fault coverage, ATPG, fault grading and simulation including scan-based and self test techniques with signature analysis. A project of modest complexity would be designed to be fabricated at MOSIS.Embedded Real Time Systems (Formerly 16.472)
Designing embedded real-time computer systems. Types of real-time systems, including foreground/background, non-preemptive multitasking, and priority-based pre-emptive multitasking systems. Soft vs. hard real time systems. Task scheduling algorithms and deterministic behavior. Ask synchronization: semaphores, mailboxes and message queues. Robust memory management schemes. Application and design of a real-time kernel. A project is required.
Pre-Reqs: EECE.2160 ECE Application Programming,EECE.3170 Microprocessor Sys Desgn I, EECE.3220 Data Structures.Principles Of Solid State Devices (Formerly 16.474/EECE.4740)
This course introduces the operating principles of Solid State Devices. Basic semiconductor science is covered including crystalline properties, quantum mechanics principles, energy bands and the behavior of atoms and electrons in solids. The transport of electrons and holes (drift and diffusion) and the concepts of carrier lifetime and mobility are covered. The course describes the physics of operation of several semiconductor devices including p-n junction diodes (forward/reverse bias, avalanche breakdown), MOSFETs (including the calculation of MOSFET threshold voltages), Bipolar transistor operation, and optoelectronic devices (LEDs, lasers, photodiodes).
Pre-Req: EECE.3650 Electronics I.Operating Systems (Formerly 16.481/EECE.4810)
Covers the components, design, implementation, and internal operations of computer operating systems. Topics include basic structure of operating systems, Kernel, user interface, I/O device management, device drivers, process environment, concurrent processes and synchronization, inter-process communication, process scheduling, memory management, deadlock management and resolution, and file system structures. laboratories include examples of components design of a real operating systems.
Pre-req: EECE.2160 ECE Application Programming, and EECE.3170 Microprocessor System Design I, and EECE.3220 Data Structures, or Permission of Instructor.Computer Architecture and Design (Formerly 16.482/EECE.4820)
Structure of computers, past and present: first, second, third and fourth generation. Combinatorial and sequential circuits. Programmable logic arrays. Processor design: information formats, instruction formats, arithmetic operations and parallel processing. Hardwired and microprogrammed control units. Virtual, sequential and cache memories. Input-output systems, communication and bus control. Multiple CPU systems.
Pre-Reqs: EECE 3170 Microprocessor Sys Desgn I,EECE 2650 Intro Logic Design.Network Design: Principles, Protocols & Applications (Formerly 16.483)
Covers design and implementation of network software that transforms raw hardware into a richly functional communication system. Real networks (such as the Internet, ATM, Ethernet, Token Ring) will be used as examples. Presents the different harmonizing functions needed for the interconnection of many heterogeneous computer networks. Internet protocols, such as UDP, TCP, IP, ARP, BGP and IGMP, are used as examples to demonstrate how internetworking is realized. Applications such as electronic mail and the WWW are studied.
Pre-req: EECE.3220 Data Structures.Computer Vision and Digital Image Processing (Formerly 16.484/EECE.4840)
Introduces the principles and the fundamental techniques for Image Processing and Computer Vision. Topics include programming aspects of vision, image formation and representation, multi-scale analysis, boundary detection, texture analysis, shape from shading, object modeling, stereo-vision, motion and optical flow, shape description and objects recognition (classification), and hardware design of video cards. AI techniques for Computer Vision are also covered. Laboratories include real applications from industry and the latest research areas.
Pre-req; EECE 2160 ECE Application Programming, and EECE 3620 Signals and Systems or Permission of Instructor.Fundamentals of Network and Cyber Security
This course will cover two categories of topics: One part is the fundamental principles of cryptography and its applications to cyber & network security in general. This part focuses on cryptography algorithms and the fundamental cyber & network security enabling mechanisms. Topics include cyber-attack analysis and classifications, public key cryptography (RSA, Diffie-Hellman), secret key cryptography (DES, IDEA), Hash (MD2, MD5, SHA-1) algorithms, key distribution and management, security handshake pitfalls and authentications, and well-known cyber & network security protocols such as Kerberos, IPSec, SSL/SET, PGP & PKI, WEP, etc. The second part surveys unique challenges and the general security & Privacy solutions for the emerging data/communication/information/computing networks (e.g., Ad Hoc & sensor network, IoTs, cloud and edge computing, big data, social networks, cyber-physical systems, critical infrastructures such as smart grids and smart transportation systems, etc.).
Pre-req: EECE.2460 Intro to Data Communication Networks, or EECE.4830 Network Design: Principles, Protocols and Applications, or Permission of Instructor.Fiber Optic Communication (Formerly 16.490)
Optical fiber; waveguide modes, multimode vs single mode; bandwidth and data rates; fiber losses; splices, couplers, connectors, taps and gratings; optical transmitters; optical receivers; high speed optoelectronic devices; optical link design; broadband switching; single wavelength systems (FDDI, SONET, ATM); coherent transmission; wavelength division multiplexing and CDMA; fiber amplifiers.
Pre-Reqs: EECE 3600 Emag Theory I, EECE 3620 Signals & Systems I or Instructor permission.Capstone Project (Formerly 16.499)
The objective of this course is to execute the project defined in Capstone Proposal. The design of the project will be completed, prototyped, tested, refined, constructed and delivered to the client. Practical experience will be gained in solving engineering problems, designing a system to meet technical requirements, using modern design elements and following accepted engineering practices. Students will work in a team environment and deliver the completed system to the project client. Proper documentation of activities is required.
Pre-Req: EECE.3991 Capstone Proposal.
RIT is "Test Optional". This means submitting SAT or ACT scores as part of your application is not required. You can choose whether or not you'd like to submit them. It's entirely up to you! On the Common App or RIT Application, you'll have the option to include test scores. If you do not include them as part of your application, RIT will not see your scores (even if you've taken a test).
Wondering how RIT will make admissions decisions without requiring test scores?
RIT will continue to review applications with a holistic approach, taking all of the applicant’s credentials into account. For applicants requesting to be reviewed without test scores, the admissions committee will continue to look at all factors of a student's application including grades earned in academic coursework; performance in honors, IB/AP courses; regents coursework and exams (for NYS residents), essay/personal statement; letters of recommendation, involvement in activities; and other achievements, along with a portfolio for those students applying to one of RIT’s BFA degrees in the Schools of Art, Design, and Film and Animation. In the absence of test scores, more weight will be placed upon the overall grade performance and other items mentioned above.
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